Electronic devices having a reduced or minimized power consumption are increasingly requested, especially for battery supplied mobile systems. In addition to memory devices, many other integrated circuits may include an array of electrically programmable and erasable memory cells addressable through dedicated decoding circuitry.
Reference will be generally made to memory devices, or briefly memories, but the same considerations apply for all devices comprising an array of memory cells. For example, system-on-chip (SOC) devices may include an array of memory cells.
In mobile systems such as cellular phones, most of the time memories remain in a quiescent or standby state. The memories are resumed or exit from this state when a read or write operation of data is commanded.
Reducing the standby current of memory devices of cellular phones, as with other battery powered devices, is an important requirement for increasing the autonomy of cellular phones and other portable battery-supplied electronic devices.
Very sophisticated manufacturing processes are used for reducing power consumption. With these processes it is possible to form integrated circuits such as arrays of memory cells and their auxiliary circuits, and eventually even other subsystems with extremely small leakage currents. With advanced technologies, it is possible to obtain quiescent current absorption of less than 1 pA/μm, even at relatively high temperatures.
Usually, at the end of the fabrication process, a test-on-wafer of the integrated circuits is carried out for verifying that the power consumption of the memory included in each of the devices fabricated on the same wafer is smaller than the specified limit value.
Memory devices with a standby power consumption that exceed the value set by the specifications are discarded, notwithstanding the fact that they would operate correctly. Normally, extremely laborious tests for locating defective cells are not performed. Therefore, defective cells that may be the cause of an excessive current in standby are not substituted using the redundancy hardware resources associated with each respective memory array.
The current absorbed in a standby state by a single cell, even if larger than a maximum allowed value, is too small for being detectable with the measurement instruments that are typically available for this kind of test-on-wafer, such as an emission microscope (EMMI) and a liquid crystal (LC).
Moreover, it is difficult to locate cells with an anomalous (excessive) current absorption in a standby state by testing whether they are correctly programmable and readable. Notwithstanding the anomalous current absorption while in a standby state, these cells may be correctly programmed and read.
It would be useful to determine whether the defective cells are all the cells of the array or only a portion of them, i.e., whether the defective cells are spread apart or grouped together in one or more specific sectors. In the latter case, it would be possible to isolate electrically specific defective sectors of the array for studying and identifying the possible causes, and eventually correcting certain parameters of the fabrication process. In many cases, the devices would not necessarily be discarded but made usable according to specific consumption limits. By marginally reducing the design capacity, this improves the yield of the manufacturing process.